Peering Into Nanowires To Measure Dopant Properties

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ScienceDaily (Apr. 13, 2009) — Semiconductor nanowires — tiny wires with a diameter as small as a few billionths of a meter — hold promise for devices of the future, both in technology like light-emitting diodes and in new versions of transistors and circuits for next generation of electronics.

But in order to utilize the novel properties of nanowires, their composition must be precisely controlled, and researchers must better understand just exactly how the composition is determined by the synthesis conditions.
Nanowires are synthesized from elements that form bulk semiconductors, whose electrical properties are in turn controlled by adding minute amounts of impurities called dopants. The amount of dopant determines the conductivity of the nanowire.
But because nanowires are so small — with diameters ranging from 3 to 100 nanometers — researchers have never been able to see just exactly how much of the dopant gets into the nanowire during synthesis. Now, using a technique called atom probe tomography, Lincoln Lauhon, assistant professor of materials science and engineering at Northwestern University’s McCormick School of Engineering and Applied Science, has provided an atomic-level view of the composition of a nanowire. By precisely measuring the amount of dopant in a nanowire, researchers can finally understand the synthesis process on a quantitative level and better predict the electronic properties of nanowire devices.
The results were published online March 29 in the journal Nature Nanotechnology.
“We simply mapped where all the atoms were in a single nanowire, and from the map we determined where the dopant atoms were,” he says. “The more dopant atoms you have, the higher the conductivity.”
Previously, researchers could not measure the amount of dopant and had to judge the success of the synthesis based on indirect measurements of the conductivity of nanowire devices. That meant that variations in device performance were not readily explained.
“If we can understand the origin of the electrical properties of nanowires, and if we can rationally control the conductivity, then we can specify how a nanowire will perform in any type of device,” he says. “This fundamental scientific understanding establishes a basis for engineering.”
Lauhon and his group performed the research at Northwestern’s Center for Atom Probe Tomography, which uses a Local Electrode Atom ProbeTM microscope to dissect single nanowires and identify their constituents. This instrumentation software allows 3-D images of the nanowire to be generated, so Lauhon could see from all angles just how the dopant atoms were distributed within the nanowire.
In addition to measuring the dopant in the nanowire, Lauhon’s colleague, Peter Voorhees, Frank C. Engelhart Professor of Materials Science and Engineering at Northwestern, created a model that relates the nanowire doping level to the conditions during the nanowire synthesis. The researchers performed the experiment using germanium wires and phosphorous dopants — and they will soon publish results using silicon — but the model provides guidance for nanowires made from other elements, as well.
“This model uses insight from Lincoln’s experiment to show what might happen in other systems,” Voorhees says. “If nanowires are going to be used in device applications, this model will provide guidance as to the conditions that will enable us to add these elements and control the doping concentrations.”
Both professors will continue working on this research to broaden the model.
“We would like to establish the general principles for doping semiconductor nanowires,” Lauhon says.
In addition to Lauhon and Voorhees, the other authors are Daniel E. Perea, Eric R. Hemesath, Edwin J. Schwalbach, and Jessica L. Lensch-Falk, all from Northwestern.
The research was supported by the Office of Naval Research and the National Science Foundation.
Journal reference:
Perea et al. Direct measurement of dopant distribution in an individual vapour–liquid–solid nanowire. Nature Nanotechnology, 2009; DOI: 10.1038/nnano.2009.51
Adapted from materials provided by Northwestern University.

Electronics: Keeping The Heat Down

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ScienceDaily (Apr. 13, 2009) — Electronic products are having to accommodate more and more components, all of which generate heat. Too much heat could put laptops and other devices out of action, so manufacturers equip them with metal plates to discharge it. A new composite can do this better.

While portable computers were still rather cumbersome several years ago, they now easily fit inside small briefcases. This is because the components on the substrates and microchips are shrinking in size with each successive model. They are also spaced closer together, allowing more circuits to be accommodated on each chip.
All of these components generate radiant heat, much like small power plants. The more components are packed into a limited space, the more difficult it is to dissipate the heat. And too much heat could put the electronics out of action. The components and connecting elements can only withstand temperatures of 90 to 130 degrees Celsius. Manufacturers therefore mount a small copper or aluminum plate underneath them to conduct the heat away. The plate, in turn, is soldered to ceramic components or silicon (the main constituent of the chip). If this system heats up, the metal plate expands about three or four times as much as the silicon or the ceramics. This causes tension which can lead to cracks in the soldered joints, so there are limits to how far components can be miniaturized.
Industrial users are calling for a material with special properties that can efficiently dissipate heat even in devices with densely packed components and that can give increasingly miniaturized electronics a longer life. The material needs to be able to conduct heat even better than the aluminum or copper materials used so far, but should not expand to a greater extent than ceramics or silicon at high temperatures. Such a material has now been developed by researchers at the Fraunhofer Institute for Manufacturing Engineering and Applied Materials Research IFAM in Dresden together with industrial partners including Siemens and Plansee as part of the EU project “ExtreMat”.
The researchers have even surpassed the already relatively high thermal conductivity of copper: “We did this by adding diamond powder to the copper. Diamond conducts heat roughly five times better than copper,” says IFAM project manager Dr. Thomas Schubert. “The resulting material expands no more than ceramics when heated, but has a conductivity one-and-a-half times superior to copper. This is a unique combination of properties.” However, it isn’t easy to unite copper and diamond. The researchers had to find a third ingredient to chemically bond the two materials. “One ingredient we can use to achieve this is chrome. Even small amounts form a carbide film on the diamond surface, and this film easily bonds to copper,” Schubert explains. First demonstrators of the material have already been produced.
Adapted from materials provided by Fraunhofer-Gesellschaft.

Better Way To Manufacture Fast Computer Chips Developed

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ScienceDaily (Apr. 8, 2009) — Engineers at Ohio State University are developing a technique for mass producing computer chips made from the same material found in pencils.

Experts believe that graphene -- the sheet-like form of carbon found in graphite pencils -- holds the key to smaller, faster electronics. It might also deliver quantum mechanical effects that could enable new kinds of electronics.
Until now, most researchers could only create tiny graphene devices one at a time, and only on traditional silicon oxide substrates. They couldn’t control where they placed the devices on the substrate, and had to connect them to other electronics one at a time for testing.
In a paper published in the March 26 issue of the journal Advanced Materials, Nitin Padture and his colleagues describe a technique for stamping many graphene sheets onto a substrate at once, in precise locations.
“We designed the technique to mesh with standard chip-making practices,” said Padture, College of Engineering Distinguished Professor in Materials Science and Engineering.
“Graphene has huge potential -- it’s been dubbed ‘the new silicon,’” said Padture, who is also director of Ohio State’s Center for Emergent Materials. “But there hasn’t been a good process for high-throughput manufacturing it into chips. The industry has several decades of chip-making technology that we can tap into, if only we could create millions of these graphene structures in precise patterns on predetermined locations, repeatedly. This result is a proof-of-concept that we should be able to do just that.”
Graphene is made of carbon atoms arranged in a hexagonal pattern resembling chicken wire. In graphite, many flat graphene sheets are stacked together.
“When you write with a pencil, you leave graphene sheets behind on the paper,” Padture said. Each sheet is so thin -- a few tenths of a nanometer (billionths of a meter) -- that researchers think of it as a two-dimensional crystal.
Researchers have shown that a single sheet, or even a few sheets, of graphene can exhibit special properties. One such property is very high mobility, in which electrons can pass through it very quickly -- a good characteristic for fast electronics. Another is magnetism: magnetic fields could be used to control the spin of graphene electrons, which would enable spin-based electronics, also called spintronics.
Yet another characteristic is how dramatically graphene’s properties change when it touches other materials. That makes it a good candidate material for chemical sensors.
In this method, Padture and his Ohio State colleagues carved graphite into different shapes -- a field of microscopic pillars, for example -- and then stamped the shapes onto silicon oxide surfaces.
“Think of a stack of graphene sheets in graphite as a deck of cards. When you bring it contact with the silicon oxide and pull it away, you can ‘split the deck’ near the point of contact, leaving some layers of graphene behind. What we found through computer simulations was that the graphene surface interacts so strongly with the silicon oxide surface that the chemical bonds between the graphene layers weaken, and the lower layers split off,” Padture said.
In this first series of experiments, the Ohio State researchers were able to stamp high-definition features that were ten layers thick, or thicker. The graphite stamp can then be used repeatedly on other predetermined locations on the same or other substrates, making this a mass-production method, potentially.
They used three different kinds of microscopes -- a scanning electron microscope, optical microscope, and atomic force microscope -- to measure the heights of the features, and assure that they were placed precisely on the substrate.
They eventually hope to stamp narrow features that are only one or two layers thick, by stamping on materials other than silicon oxide.
In computer simulations, they found that each material interacts differently with the graphene. So success might rely on finding just the right combination of substrate materials to coax the graphene to break off in one or two layers. This would also tailor the properties of the graphene.
Padture’s co-authors on the paper include Dongsheng Li, a postdoctoral researcher, and Wolfgang Windl, associate professor of materials science and engineering.
This work was partially funded by the Center for Emergent Materials at Ohio State, which is a Materials Research Science & Engineering Center (MRSEC) sponsored by the National Science Foundation. Partial funding was also provided by Ohio State’s Institute for Materials Research.
Adapted from materials provided by Ohio State University.

Electrosmog On The Circuit Board

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ScienceDaily (Apr. 9, 2009) — The smaller the components in electronic circuits, the more interference-prone they are. If the components are too densely packed, they can interfere with one another. A near-field scanner can accurately detect weak fields and help to protect bank cards against fraud.

Their miniature size is their strength – and also their weakness. Be it in cell phones, cars or computers, electronic components are getting smaller and smaller and increasingly powerful. The smaller they are, the faster they can switch and the less energy they need for each switching operation. However, as energy requirements shrink, so do signal-to-noise ratios. “Circuits are becoming more and more susceptible with each generation,” explains Thomas Mager of the Fraunhofer Research Institution for Electronic Nano Systems ENAS in Paderborn.
“Only a few years ago, it still took several volts to destabilize processors. Today, a few hundred millivolts are sometimes enough to disrupt millions of transistors.” This means that designers of electronic circuits need to give greater consideration to electromagnetic compatibility. It is no longer just a question of protecting complete electronic packages such as cell phones or MP3 players against external influences, or shielding the environment against their electromagnetic emissions, but is also about how each individual component on the circuit board behaves.
In a collaborative project carried out with Continental and Infineon Technologies, the Fraunhofer ENAS has developed a measuring system that can locate even the weakest electrical and magnetic fields to an accuracy of a few hundredths of a millimeter. Where are there areas of conspicuously high electromagnetic radiation? How do the components influence one another? The near-field scanner can scan not only individual chips and processors but also complete laptops, cell phones or aircraft control units, and can reveal which types of field the test object is radiating.
”We are also working with our French project partner CEA-Leti on a function that applies targeted electromagnetic fields to the test object. In this way, we can test for areas that respond sensitively to external fields,” says Mager. This makes the system particularly interesting for developers of smart cards. Fraudsters elicit confidential information from bank cards by bombarding them with pulses of laser light, electrical current or voltage. The resulting field patterns can reveal details about the chip card, such as its PIN number. The near-field scanner provides time- and space-resolved images of the radiated fields of the card, allowing their weak points to be identified and helping card developers to better protect their products against fraud.
Adapted from materials provided by Fraunhofer-Gesellschaft.

World's First Nanofluidic Device With Complex 3-D Surfaces

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ScienceDaily (Apr. 10, 2009) — Researchers at the Commerce Department's National Institute of Standards and Technology (NIST) and Cornell University have capitalized on a process for manufacturing integrated circuits at the nanometer (billionth of a meter) level and used it to develop a method for engineering the first-ever nanoscale fluidic (nanofluidic) device with complex three-dimensional surfaces. The Lilliputian chamber is a prototype for future tools with custom-designed surfaces to manipulate and measure different types of nanoparticles in solution.

Among the potential applications for this technology: the processing of nanomaterials for manufacturing; the separation and measuring of complex nanoparticle mixtures for drug delivery, gene therapy and nanoparticle toxicology; and the isolation and confinement of individual DNA strands for scientific study as they are forced to unwind and elongate (DNA typically coils into a ball-like shape in solution) within the shallowest passages of the device.
Nanofluidic devices are usually fabricated by etching tiny channels into a glass or silicon wafer with the same lithographic procedures used to manufacture circuit patterns on computer chips. These flat rectangular channels are then topped with a glass cover that is bonded in place. Because of the limitations inherent to conventional nanofabrication processes, almost all nanofluidic devices to date have had simple geometries with only a few depths. This limits their ability to separate mixtures of nanoparticles with different sizes or study the nanoscale behavior of biomolecules (such as DNA) in detail.
To solve the problem, NIST's Samuel Stavis and Michael Gaitan teamed with Cornell's Elizabeth Strychalski to develop a lithographic process to fabricate nanofluidic devices with complex 3-D surfaces. As a demonstration of their method, the researchers constructed a nanofluidic chamber with a "staircase" geometry etched into the floor. The "steps" in this staircase—each level giving the device a progressively increasing depth from 10 nanometers (approximately 6,000 times smaller than the width of a human hair) at the top to 620 nanometers (slightly smaller than an average bacterium) at the bottom—are what give the device its ability to manipulate nanoparticles by size in the same way a coin sorter separates nickels, dimes and quarters.
The NIST-Cornell nanofabrication process utilizes grayscale photolithography to build 3-D nanofluidic devices. Photolithography has been used for decades by the semiconductor industry to harness the power of light to engrave microcircuit patterns onto a chip. Circuit patterns are defined by templates, or photomasks, that permit different amounts of light to activate a photosensitive chemical, or photoresist, sitting atop the chip material, or substrate.
Conventional photolithography uses photomasks as "black-or-white stencils" to remove either all or none of the photoresist according to a set pattern. The "white" parts of the pattern—those that let light through—are then etched to a single depth into the substrate. Grayscale photolithography, on the other hand, uses "shades of gray" to activate and sculpt the photoresist in three dimensions. In other words, light is transmitted through the photomask in varying degrees according to the "shades" defined in the pattern. The amount of light permitted through determines the amount of exposure of the photoresist, and, in turn, the amount of photosensitive chemical removed after development.
The NIST-Cornell nanofabrication process takes advantage of this characteristic, allowing the researchers to transfer a 3-D pattern for nanochannels of numerous depths into a glass substrate with nanometer precision using a single etch.
The result is the "staircase" that gives the 3-D nanofluidic device its versatility.
Size exclusion of nanoparticles and confinement of individual DNA strands in the 3-D nanofluidic device is accomplished using electrophoresis, the method of moving charged particles through a solution by forcing them forward with an applied electric field. In these novel experiments, the NIST-Cornell researchers tested their device with two different solutions: one containing 100-nanometer-diameter polystyrene spheres and the other containing 20-micrometer (millionth of a meter)-length DNA molecules from a virus that infects the common bacterium Escherichia coli. In each experiment, the solution was injected into the deep end of the chamber and then electrophoretically driven across the device from deeper to shallower levels. Both the spheres and DNA strands were tagged with fluorescent dye so that their movements could be tracked with a microscope.
In the trials using rigid nanoparticles, the region of the 3-D nanofluidic device where the channels were less than 100 nanometers in depth stayed free of the particles. In the viral DNA trials, the genetic material appeared as coiled in the deeper channels and elongated in the shallower ones. These results show that the 3-D nanofluidic device successfully excluded rigid nanoparticles based on size and deformed (uncoiled) the flexible DNA strands into distinct shapes at different steps of the staircase.
Currently, the researchers are working to separate and measure mixtures of different-sized nanoparticles and investigate the behavior of DNA captured in a 3-D nanofluidic environment.
In a previous project, the NIST-Cornell researchers used heated air to create nanochannels with curving funnel-shaped entrances in a process they dubbed "nanoglassblowing." Like its new 3-D cousin, the nanoglassblown nanofluidic device facilitates the study of individual DNA strands.
The work described in the Nanotechnology paper was supported in part by the National Research Council Research Associateship Program and Cornell's Nanobiotechnology Center, part of the National Science Foundation's Science and Technology Center Program. The 3-D nanofluidic devices were fabricated at the Cornell Nanoscale Science and Technology Facility and the Cornell Center for Materials Research, and characterized at the NIST Center for Nanoscale Science and Technology. All experiments were performed at the NIST laboratories in Maryland.
As a non-regulatory agency, NIST promotes U.S. innovation and industrial competitiveness by advancing measurement science, standards and technology in ways that enhance economic security and improve our quality of life.
Journal reference:
S.M. Stavis, E.A. Strychalski and M.Gaitan. Nanofluidic structures with complex three-dimensional surfaces. Nanotechnology, Vol. 20, Issue 16 (online March 31, 2009; in print April 22, 2009)
Adapted from materials provided by National Institute of Standards and Technology.